-- Patrick Wagstrom
-- CS471 - 001
-- Lab 10: n-Bit ALU with Overflow

LIBRARY ieee;
USE ieee.std_logic_1164.all;

ENTITY alu1of IS
	PORT ( a, b: IN STD_LOGIC;
		zero_in, carry_in, less: IN STD_LOGIC;
		control: IN STD_LOGIC_VECTOR (2 DOWNTO 0);
		set, zero_out, result, carry_out, overflow: OUT STD_LOGIC);
END alu1of;

ARCHITECTURE dataflow OF alu1of IS
	SIGNAL b_tmp, add_tmp, result_tmp, carry_tmp: STD_LOGIC;
	SIGNAL sel_tmp: STD_LOGIC_VECTOR (1 DOWNTO 0);
BEGIN
	WITH control(2) SELECT
	b_tmp <= NOT b WHEN '1', 
		b WHEN OTHERS;

	sel_tmp <= control(1) & control(0);
	add_tmp <=	((a AND b_tmp AND carry_in) or (a AND NOT b_tmp AND NOT carry_in) 
			or (NOT a AND b_tmp AND NOT carry_in) or (NOT a AND NOT b_tmp AND carry_in));
	WITH sel_tmp SELECT
		result_tmp <= (a AND b_tmp) WHEN "00",
			(a OR b_tmp) WHEN "01",
			add_tmp WHEN "10",
			less WHEN "11",
			'0' WHEN OTHERS;

	carry_tmp <= ((a AND carry_in) OR (a AND b_tmp) OR (b_tmp AND carry_in));

	carry_out <= carry_tmp;
	zero_out <= NOT (zero_in OR result_tmp);
	result <= result_tmp;
	overflow <= (carry_tmp XOR carry_in);
	-- the set less than is contingent on the highest order bit
	set <= add_tmp;
END dataflow;