--
-- Patrick Wagstrom
-- CS471-001
-- jalAddr.vhd
-- thingey to allow me to calculate the value for JAL
-- also allows me to overwrite what it thinks the destination register should be so JAL always
-- links to register 7
--

LIBRARY ieee;
USE ieee.std_logic_1164.all;
LIBRARY lpm;
USE lpm.lpm_components.all;

ENTITY jalAddr IS
	PORT (jal, lw: IN STD_LOGIC;
		pcIn : IN STD_LOGIC_VECTOR (4 DOWNTO 0);
		loadData : IN STD_LOGIC_VECTOR (15 DOWNTO 0);
		rdDataIn : IN STD_LOGIC_VECTOR (15 DOWNTO 0);
		rdDataOut : OUT STD_LOGIC_VECTOR (15 DOWNTO 0));
END jalAddr;

ARCHITECTURE noniterative OF jalAddr IS
	SIGNAL newPCSig : STD_LOGIC_VECTOR (4 DOWNTO 0);
	SIGNAL pcAddSig : STD_LOGIC_VECTOR (4 DOWNTO 0);
	SIGNAL outputSig : STD_LOGIC_VECTOR (1 DOWNTO 0);
BEGIN
	pcAddSig <= "00001";
	
	g0:	LPM_ADD_SUB GENERIC MAP (LPM_WIDTH=>5)
			PORT MAP(DATAA=>pcIn, DATAB=>pcAddSig, RESULT=>newPCSig);

	outputSig <= jal & lw;
	WITH outputSig SELECT
		rdDataOut <= "00000000000" & newPCSig WHEN "10",
			loadData WHEN "01",
			rdDataIn WHEN OTHERS;
END noniterative;