--
-- patrick wagstrom
-- wagspat@charlie.cns.iit.edu
-- shift16.vhd
-- 16 bit shifter
--

LIBRARY ieee;
USE ieee.std_logic_1164.all;

LIBRARY work;
USE work.wagspak.all;

ENTITY shift16 IS
	GENERIC (N: INTEGER := 16);
	PORT (control : IN STD_LOGIC_VECTOR(3 DOWNTO 0);
		data_in : IN STD_LOGIC_VECTOR(N-1 DOWNTO 0);
		r_l_shift : IN STD_LOGIC;
		data_out: OUT STD_LOGIC_VECTOR(N-1 DOWNTO 0));
END shift16;

ARCHITECTURE df OF shift16 IS
	SIGNAL s12, s24, s48: STD_LOGIC_VECTOR(N-1 DOWNTO 0);
BEGIN
	s1: shiftn_1 GENERIC MAP (N) PORT MAP(control(0), r_l_shift, data_in, s12);
	s2: shiftn_2 GENERIC MAP (N) PORT MAP(control(1), r_l_shift, s12, s24);
	s4: shiftn_4 GENERIC MAP (N) PORT MAP(control(2), r_l_shift, s24, s48);
	s8: shiftn_8 GENERIC MAP (N) PORT MAP(control(3), r_l_shift, s48, data_out);
END df;